- AutorIn
- Dipl.-Ing. Marko Rößler
- Prof. Dr.-Ing. Ulrich Heinkel
- Titel
- Preemptive HW/SW-Threading by combining ESL methodology and coarse grained reconfiguration
- Zitierfähige Url:
- https://nbn-resolving.org/urn:nbn:de:bsz:ch1-qucosa-130002
- Quellenangabe
- ReCoSoC '08: Proceedings of the International Conference on Reconfigurable Communication-centric SoCs
- Abstract (EN)
- Modern systems fulfil calculation tasks across the hardware- software boundary. Tasks are divided into coarse parallel subtasks that run on distributed resources. These resources are classified into a software (SW) and a hardware (HW) domain. The software domain usually contains processors for general purpose or digital signal calculations. Dedicated co-processors such as encryption or video en-/decoding units belong to the hardware domain. Nowadays, a decision in which domain a certain subtask will be executed in a system is usually taken during system level design. This is done on the basis of certain assumptions about the system requirements that might not hold at runtime. The HW/SW partitioning is static and cannot adapt to dynamically changing system requirements at runtime. Our contribution to tackle this, is to combine a ESL based HW/SW codesign methodology with a coarse grained reconfigurable System on Chip architecture. We propose this as Preemptive HW/SW-Threading.
- Freie Schlagwörter (EN)
- ESL, HW/SW Codesign, High-Level-Synthesis
- Codesign, ESL, High-Level-Synthesis
- Klassifikation (DDC)
- 004
- 005
- 006
- Normschlagwörter (GND)
- Elektrotechnik, Informationstechnik, Integrierte Schaltung
- Publizierende Institution
- Technische Universität Chemnitz, Chemnitz
- URN Qucosa
- urn:nbn:de:bsz:ch1-qucosa-130002
- Veröffentlichungsdatum Qucosa
- 14.01.2014
- Dokumenttyp
- Konferenzbeitrag
- Sprache des Dokumentes
- Englisch